EE 652 Semiconductor Memory Circuits and Architectures

Second  Term 2000/2001 (2001w)       last updated 2001-1-8
Professor Duncan Elliott 492-5357 CAB 471


General Course Info

Monday & Wednesday 10 am
in CAB 377

starting Monday January 8

calendar description

Memory design was once a craft practiced by few.  System designers would buy commodity memory chips rather than design their own memory arrays.  With the continuing push to put larger systems on a single chip, most of the transistors are now in the memories.  Memory design issues now become every digital VLSI designer's concern (and hence employers).

This course covers memory circuits and architectures of several families of semiconductor memories with emphasis on DRAM, and include SRAM, flash, and ferroelectric memories.  Topics include sensing, decoding, speed-area-power trade-offs, redundancy, interfaces and novel applications.  Course work includes lectures, assignments, a focused literature review and a design project.

A background in MOS circuits, circuit simulation and VLSI layout is assumed.  The prerequisite is one of EE 483, EE 653 or consent of the instructor.

Please send me email, attend the first lecture or drop by my office (CAB 471) if you want more information.

Preliminary labs

Did reading this leave any questions unanswered?
Comments on the contents of these pages are welcome, - Duncan Elliott