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A Transputer Approach to Data Acquisition

The transputer is particularly well suited for use in real-time applications and is a good building block for any geographically distributed data acquisition system. The important properties of the transputer which make it an attractive alternative to the conventional approaches to data acquisition are:

In addition, transputer systems are easy to build since a minimum number of external components are needed, including ROM, and code can be down-loaded and networks booted via a single transputer link.

Two approaches have been taken to transferring data between the component front-end boards and the readout modules in ZEUS:

  1. treating the crate back-plane as an extension of the transputer external memory [10] and
  2. a VME approach [5].

The advantage of the first method is the simple interface. This approach uses a custom-built crate with a Teradyne back-plane and a readout controller board containing two IMS T425 transputers. One transputer acts as the master processor on the board and has the crate back-plane mapped directly into its memory, along with a dual-port memory and control registers. The second transputer has the same map except it has no back-plane and control addresses. In addition, six transputer module (TRAM) sockets are available on each readout board to accommodate additional transputers, for example, for second level trigger processing.

The second approach to readout is very general and has been used by most components in ZEUS. It is based on a module which we will refer to as the 2TP-VME module [5]. This unit consists of two IMS T425 or two IMS T800 transputers. Both transputers are connected via private ports to a triple-port memory and have access to a VMEbus via a local bus. In this VME system there is no need for an external arbiter if the 2TP-VME module is the only master in the VME crate. The VMEbus interface can accommodate various VME cycles and a transfer rate over the VMEbus of 10 Mbyte/s has been obtained.

The 2TP-VME module is extensively used in the global second level trigger and event-builder, and allows a common interface to the components using one of three options:

  1. directly via a transputer link using a twisted-pair cable with buffered input and output conforming to the RS422 standard,
  2. via a VMEbus by installing a 2TP-VME module in the component's sub-system crate or
  3. using a link adapter card connected to a 68020 FIC processor board.

The two readout modules described above incorporate all the facilities needed to build a large scale real-time data acquisition and trigger system; there is an interface to a standard bus, large data transfer capability under DMA-control and hardware redundancy. Two transputers per readout board leads to a natural partitioning of the modules with one transputer for data transport and the other for second level trigger processing. In the case of the 2TP-VME module, the triple-port memory can be considered as a high bandwidth inter-transputer link between the two transputers or the board as a whole can be considered as one transputer with two closely coupled CPUs having eight bi-directional links (16 DMA controllers in total).


next up previous
Next: Transputer Systems in ZEUS Up: A Transputer Trigger and Previous: The Transputer and occam

Douglas M. Gingrich
Thu Mar 28 18:34:03 MST 1996