The global second level trigger is responsible for combining and correlating trigger summary data from the component second level trigger systems and making the final decision of whether or not to accept the event. The global second level trigger decision is broadcast to each component's readout modules. The data residing in the component readout module memories for the accepted event is assembled together in a single crate for each component and sent to the ZEUS event-builder. 80-90% of the ZEUS data is transported by transputer links at this stage.
The global second level trigger design throughput is 1 kHz which implies that any single processing step in the second level system must take less than 1 ms. The total latency of the global second level trigger is required to be less than 3 ms and all components should have at least a 15 event buffer between its second level trigger system and the global second level trigger. Simulations show that this buffer should be half full on average and that the component's latency should be less than 5 ms. Fourteen components interface to the global second level trigger, of which eight use transputer links.
In designing the global second level trigger network seven possible hardware layouts [14] were studied to choose
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Fig. 5. The ZEUS event-builder.
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the optimal configuration based on timing, bandwidth, algorithm and special hardware requirements. The chosen scheme consists of eight input modules, five sub-trigger modules, a central trigger module and a control and switch box; see Fig. 4. The entire system occupies two VME-crates.
In the global second level trigger, processors (input modules) receive data from the components and distribute it to a second layer of processors (sub-trigger modules) in such a way that every processor in the second layer has access to all the data. One or more trigger algorithms on each processor in the second layer analysis the data of one or more components and form a trigger decision. The results of these algorithms are then transferred to a central trigger processor where the final global second level decision is formed.
Two links of the IMS T222 transputer on the input modules are used for transferring data from the components. There are eight of these modules and therefore 16 input channels. The third link of the input modules is connected to the link switch module (LKS) of the control and switch box (CSB). Over this link, code and commands for the input and sub-trigger modules can be transferred. The fourth link is connected to the link broadcast circuit (LKB).
A maximum of eight sub-triggers (16 transputers on eight 2TP-VME modules) can be connected to the input modules. The initial configuration consists of five sub-triggers of which one is used for monitoring. The decisions of the sub-triggers and all data required by the event-builder are transferred over the VMEbus to a transputer in the central trigger module.
The second transputer in the central trigger module is used to monitor and control the system. One of the links on this transputer is used to transfer code and commands, via the control and switch box, to the input and sub-trigger modules. The global second level trigger is connected to the event-builder with two transputer links: one for data transfer and one to transfer the trigger decision to the components via a purpose-build fan-out board in the event-builder.
The control of the transputers in the network is handled by the control and switch box. Four modules inside the control and switch box communicate over the back-plane of the crate: a IMS T222 transputer (TRP) for control of the box, a link switch board (LKS) containing a IMS C004 cross-bar link switch and two analyse-reset-error boards (ARE) which can reset a transputer layer.
The global second level trigger receives a total of 1 kbyte/event of data on average from the components and forms a second level decision in less than 3 ms. The slowest component in the second level trigger system has an average latency of 7 ms. A maximum rate of 3.3 kHz has been achieved for the case of no processing.