Bi-directional Tristate Bus Controller

by
Eric Cheung, Felicia Cheng, Tin Wai Kwan, David Li


    Bi-directional Tri-state bus is useful for signals that flow in both directions.  It is especially useful when interfacing external component that needs has bi-direction data transfer such as RAM.  It allows the user to select whether to send or received data through the bus.  To do that, the bi-dir tristate bus utilize Tri-state buffers to control the signal traffic in order to prevent bus contention.  Bus contention is usually generated by both sources in each end trying to drive the bus.  The Tri-state bus ensures that at least one side of the bus is in high impedance state, allowing the other side to drive the signal.

fig.1 A signal tri-state buffer

    To build a bi-direction tri-state bus, you need to use two tri-state buffer for each bus line.

fig.2 A bi-directional tri-state line

Notice the inverter on the bottom buffer, that allows the buffer have an opposite enable signal from the upper one, ensuring the bus can only be in either read or write state.

This setup only ensure one side of the bus, bus contention error can still occur if the opposite side is not synchronous with this side.

Here's a vhdl code that implements the tri-state bus above.  It is obtained from the Altera web-site, and modified by our group to support optional bus width.