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-- Barrel shifter testbench.
-- Verifies that the shifter rotates the bits correctly.
--
-- $Id: barrel_shift_tb.vhd,v 1.1 2003/03/25 20:32:41 leendert Exp $
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_misc.all;
use ieee.std_logic_unsigned.all;
library work;

entity barrel_shift_tb is
end entity barrel_shift_tb;

architecture test of barrel_shift_tb is
-- 16 bit barrel shifter
constant selectorWidth: natural := 4;
-- component declaration for the barrel shifter without the generic
-- parameter (Modelsim fails to bind if the generic parameter is present)
component barrel_shift is
    -- see the package declaration for signal descriptions.
    port (
        numShifts: in std_logic_vector(selectorWidth-1 downto 0);
        shiftIn: in std_logic_vector(2**selectorWidth-1 downto 0);
        shiftOut: out std_logic_vector(2**selectorWidth-1 downto 0)
    );
end component barrel_shift;

-- propagation delay after which the output is checked
constant PROP_TIME : time := 40 ns; -- fast enough for 25MHz clock
constant SELECTOR_WIDTH : integer := 4;

-- input and output data
signal shiftIn, shiftOut: std_logic_vector(2**SELECTOR_WIDTH-1 downto 0);

-- number of places to shift
signal numShifts: std_logic_vector(SELECTOR_WIDTH-1 downto 0);
begin

-- connect the shift unit to the test bench
UUT : barrel_shift
    port map (
        numShifts => numShifts,
        shiftIn => shiftIn,
        shiftOut => shiftOut
    );
    
test_seq: process
begin
    shiftIn <= "1000000000000001";
    
    for shiftBits in 1 to 15 loop
        numShifts <= conv_std_logic_vector(shiftBits, SELECTOR_WIDTH);
        wait for PROP_TIME;
        assert std_logic_vectortobit_vector(shiftOut) =
            (std_logic_vectortobit_vector(shiftIn) rol shiftBits)
            report "Rotating left failed" severity error;
    end loop;
    wait;
end process test_seq;

end architecture test;