-- Accel_Control.vhd

-- This file was auto-generated as part of a SOPC Builder generate operation.
-- If you edit it your changes will probably be lost.

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity Accel_Control is
	port (
		clk                     : in    std_logic                     := '0';             --        clock.clk
		reset_n                 : in    std_logic                     := '0';             --        reset.reset_n
		avalon_slave_address    : in    std_logic_vector(2 downto 0)  := (others => '0'); -- avalon_slave.address
		avalon_slave_readdata   : out   std_logic_vector(31 downto 0);                    --             .readdata
		avalon_slave_writedata  : in    std_logic_vector(31 downto 0) := (others => '0'); --             .writedata
		avalon_slave_write_n    : in    std_logic                     := '0';             --             .write_n
		avalon_slave_chipselect : in    std_logic                     := '0';             --             .chipselect
		avalon_slave_byteenable : in    std_logic_vector(3 downto 0)  := (others => '0'); --             .byteenable
		avalon_slave_read       : in    std_logic                     := '0';             --             .read
		scl_i2c_to_accel        : out   std_logic;                                        --  conduit_end.export
		sda_i2c_to_accel        : inout std_logic                     := '0';             --             .export
		scl_i2c_to_bus          : in    std_logic                     := '0';             --             .export
		sda_i2c_to_bus          : inout std_logic                     := '0';             --             .export
		interrupt2              : in    std_logic                     := '0';             --             .export
		sda_padoen_o            : in    std_logic                     := '0'              --             .export
	);
end entity Accel_Control;

architecture rtl of Accel_Control is
	component accelerometer is
		port (
			clk                     : in    std_logic                     := 'X';             -- clk
			reset_n                 : in    std_logic                     := 'X';             -- reset_n
			avalon_slave_address    : in    std_logic_vector(2 downto 0)  := (others => 'X'); -- address
			avalon_slave_readdata   : out   std_logic_vector(31 downto 0);                    -- readdata
			avalon_slave_writedata  : in    std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
			avalon_slave_write_n    : in    std_logic                     := 'X';             -- write_n
			avalon_slave_chipselect : in    std_logic                     := 'X';             -- chipselect
			avalon_slave_byteenable : in    std_logic_vector(3 downto 0)  := (others => 'X'); -- byteenable
			avalon_slave_read       : in    std_logic                     := 'X';             -- read
			scl_i2c_to_accel        : out   std_logic;                                        -- export
			sda_i2c_to_accel        : inout std_logic                     := 'X';             -- export
			scl_i2c_to_bus          : in    std_logic                     := 'X';             -- export
			sda_i2c_to_bus          : inout std_logic                     := 'X';             -- export
			interrupt2              : in    std_logic                     := 'X';             -- export
			sda_padoen_o            : in    std_logic                     := 'X'              -- export
		);
	end component accelerometer;

begin

	accel_control : component accelerometer
		port map (
			clk                     => clk,                     --        clock.clk
			reset_n                 => reset_n,                 --        reset.reset_n
			avalon_slave_address    => avalon_slave_address,    -- avalon_slave.address
			avalon_slave_readdata   => avalon_slave_readdata,   --             .readdata
			avalon_slave_writedata  => avalon_slave_writedata,  --             .writedata
			avalon_slave_write_n    => avalon_slave_write_n,    --             .write_n
			avalon_slave_chipselect => avalon_slave_chipselect, --             .chipselect
			avalon_slave_byteenable => avalon_slave_byteenable, --             .byteenable
			avalon_slave_read       => avalon_slave_read,       --             .read
			scl_i2c_to_accel        => scl_i2c_to_accel,        --  conduit_end.export
			sda_i2c_to_accel        => sda_i2c_to_accel,        --             .export
			scl_i2c_to_bus          => scl_i2c_to_bus,          --             .export
			sda_i2c_to_bus          => sda_i2c_to_bus,          --             .export
			interrupt2              => interrupt2,              --             .export
			sda_padoen_o            => sda_padoen_o             --             .export
		);

end architecture rtl; -- of Accel_Control
