# clk
# cpu_0
set_global_assignment -name SDC_FILE [file join $::quartus(qip_path) cpu_0.sdc]
set_global_assignment -name SOURCE_FILE [file join $::quartus(qip_path) cpu_0.ocp]
# tri_state_bridge_0
# cfi_flash_0
# sdram_0
# epcs_controller
# jtag_uart_0
# uart_0
# timer_0
# timer_1
# lcd_16207_0
# SEG7_Display
# sram_0
# Audio_0
# SD_DAT
# SD_CMD
# SD_CLK
# noteA
# noteB
# noteC
# noteD
# noteE
# noteF
# noteG
# MS
# dist_sensor
# RST
# Oct_UP
# Oct_DOWN
# Accel_Control
set_global_assignment -name TCL_FILE [file join $::quartus(qip_path) Accelerometer1/accelerometer_hw.tcl]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) Accelerometer1/accelerometer.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) Accel_Control.vhd]
# i2c_master
set_global_assignment -name TCL_FILE [file join $::quartus(qip_path) altera_avalon_opencores_i2c/opencores_i2c_master_hw.tcl]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) altera_avalon_opencores_i2c/opencores_i2c_master.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) altera_avalon_opencores_i2c/i2c_master_top.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) altera_avalon_opencores_i2c/i2c_master_byte_ctrl.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) altera_avalon_opencores_i2c/i2c_master_bit_ctrl.vhd]
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) i2c_master.vhd]
# altpll_0
set_global_assignment -name TCL_FILE [file join $::quartus(ip_rootpath) altera/sopc_builder_ip/altera_avalon_altpll/altera_avalon_altpll_hw.tcl]
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) altpll_0.v]
# null
set_global_assignment -name SDC_FILE [file join $::quartus(ip_rootpath) altera/sopc_builder_ip/altera_avalon_clock_adapter/altera_avalon_clock_adapter.sdc]
set_global_assignment -name SOPC_BUILDER_SIGNATURE_ID 2C27D73EA8ED0000013DFFDFA30B 
 