CMPE 480 Advanced Digital Logic Design

General Course Info

Office hours
 

Outline

• Digital system design concepts & review of classical sequential logic design
• VHDL hardware description language and logic simulation
• Digital system design
• Design of arithmetic circuits
• Introduction to digital system testing
  

Marking

Problem sets are due at the beginning of lectures (Wednesdays??).  Mutually beneficial collaboration on these problem sets is encouraged, provided that the names of all collaborators are cited near the student's name.  Marking will be based on effort.  Please do not put student id numbers on problem sets.

Quizzes will be held at the beginning of selected lectures where problem sets have been assigned.  The only permitted aids are the student's own problem set and a calculator.

Design assignments must be completed in groups of one or two without assistance.  Submissions are due by 3:40 pm in the CMPE480 lecture-assignment box in the ECERF-ETLC atrium.   Late submissions will be penalized 20% of the assigned mark per school day.   Architecture assignments should be brief but sufficiently clear and readable that you would be happy to submit them to a busy engineering manager.  If it only takes a sentence to describe something, then it should be described in a sentence.  Architecture assignments should include:

• Title page with names, but no student ID numbers
  
• for each part include:
• Assumptions made
• Legible code, diagrams, tables, etc. as required (each page has to explain its self to the TA)
• A brief written summary of the results and the work you did to arrive at them
• annotate any simulations
  
• Remember that bonus questions are mainly for entertainment.  Don't attempt them if you're pressed for time.
• Any feedback on how the lab went that could be helpful to the TA or professor

Past CMPE 480 handouts, term work, etc. can be picked up from a box on the counter opposite room ECERF w2-063.  To find it, pass through ECE reception, jog left and you'll find the counter to your right.

Submissions will not normally be re-graded more than two weeks after the first day these have been returned in class.

For lab policies and marking, see http://www.ece.ualberta.ca/~cmpe480/lab/labs.htm

Lab projects are new for this year.  With your professor's permission, you can replace one or both of the last 2 labs with a design project of your choice. A demonstration, presentation and report will be required.  See here for details.

The following calculators are permitted for examinations in this course: faculty approved programmable calculators, faculty approved non-programmable calculators,  slide rules, and instructor approved abacuses (if used quietly).  Programmable calculators will probably offer little or no advantage over non-programmable calculators.  Students must not distract other students during exams, so please turn off the calculator beep.

The midterm and final examination aid sheets must be in the student’s own handwriting (both sides, no photocopies or printouts), may be no larger than 21.59 by 27.94 cm (8.5 by 11 inch) paper, and may contain any information.

Deferred examinations may contain multiple components (including an oral component) as designed by instructor.

Grade Determination Method

Code of Student Behaviour

Library Resources

Textbooks

Lecture Notes

Problem Sets & Design Assignments

Manufacturer's Information